The production of semiconductor devices – such as logic, memory and controller chips – requires multilayer structures comprising submicroscopic structures of silicon, silicon dioxide (interlayer dielectrics), tungsten (interconnects), copper (conductors) and others. Perfectly functioning devices require precise geometrical dimensions, which can be generated by photolithography and CMP (chemical-mechanical planarizing). Each layer must be planarized at a nanoscale before the next processing stage. With increasing complexity of the devices, more CMP stages are required – and the consumption of CMP slurries also increases. HDK^® pyrogenic silica optimizes the process by serving as abrasive particles during the production of CMP slurries.